Candidates
| RTL Design Engineer - ASIC and FPGA |
| Permanent Salary: £ 38000 - £ 70000 |
| Location: Southampton |
| RTL Design Engineer required to work on semiconductor IP for 5G mobile communications chipsets. Key skills HDL programming experience (SystemVerilog or VHDL) Software programming (Matlab, C, SystemC) EDA tools and process libraries Knowledge of signal processing hardware acceleration Appreciation of telecoms / mobile communications systems |
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